The industry is excited about RISC-V, and rightly so. It is enabling companies to take back control of their software execution environment without having to assume the huge responsibilities that come along with processor development and support of an ecosystem for it. Maybe a company wants to use a commercially developed core today, get the software developed and the processor integrated and then in a future generation, replace that with their own core. Perhaps they envision a range of products where the processor is tuned for each product in the family. There are so many possibilities that were out of reach in the past. (more…)
Author Archive
PSS and RISC-V – A Match Made In Verification
Thursday, November 14th, 2019Methodology Convergence
Thursday, August 8th, 2019It is unfortunate that design and verification methodologies have often been out of sync with each other, and increasingly so over the past 20 years. The design methodology change that caused one particular divergence was the introduction of design Intellectual Property (IP). IP meant that systems were no longer designed and built in a pseudo top-down manner, but contemplated at a higher level and constructed in a bottom up, ‘lego-like’ manner by choosing appropriate blocks that could implement the necessary functions. (more…)
Multi-Dimensional Verification
Tuesday, May 28th, 2019It seems like ancient history now, but in the not so distant past, verification was performed by one tool – simulation; at one point in the flow – completion of RTL; using one language and methodology – SystemVerilog and UVM. That changed when designs continued to get larger and simulators stopped getting fast enough. Additional help became necessary in the form of emulators and formal verification, but that coincided with an increasingly difficult task of creating a stable testbench. It was no longer possible to migrate a design from a simulator to an emulator without doing a considerable amount of work on the testbench. (more…)
Improve or Enable
Thursday, April 18th, 2019New tools, languages, or methodologies can be an improvement over existing ones, or they can be enablers for something different. The recently approved Accellera Portable Stimulus Standard (PSS) can be either or both. (more…)
Interim Solutions to the Standards Gap
Thursday, March 14th, 2019The point of standards is to bring an industry together, to avoid duplication of effort, and to reduce risks associated with adoption of technology that may lock a user into a single vendor. These are some of the reasons why Breker was glad to see the creation of the Portable Stimulus working group within Accellera and actively participated in it since its inception. We donated technology and invested more time and effort, as a percentage of company size, than any other player. We were also glad to see the release of version 1.0 of the standard at DAC in 2018 – a huge step for the industry.
But was it enough? Some standards are ratified having been developed and refined by a single company and successfully proliferated across an industry, prior to donation to a standards body. Others are designed by committee and therefore run the risk of an unproven body of work captured as a hard to change standard. Sometimes this works well, other times, less so. It is only after the fact that you know if the committee got it right. So far the Portable Stimulus Standard is being tested by a relatively large number of companies with success, but there are still missing elements for a scalable solution. (more…)
Your Invitation to Verification 3.0 Innovation Summit
Friday, March 8th, 2019Come one, come all to the first event of what we expect will be many –– Verification 3.0 Innovation Summit –– Tuesday, March 19, from 1 p.m. until 8 p.m. at the Levi’s Stadium Team Auditorium in Santa Clara, Calif. (more…)
What Can PSS Do For You? See Breker’s Demos of Trek5’s Capabilities at DVCon
Thursday, February 21st, 2019All of us at Breker invite DVCon attendees to step into our booth (#701) and expect to be amazed. You will see practical demonstrations of our new feature-rich Trek5 with practical examples of how the Portable Stimulus Standard can be applied to accelerate UVM coding for complex blocks and Software Driven Verification (SDV) for large SoCs. (more…)
Methodology, Language and Tools
Tuesday, January 15th, 2019Let me start by laying the cards on the table – the Portable Stimulus Standard (PSS) is a language, not a methodology. Tools are not methodologies. Languages ensure a well-ordered transfer of information from which tools can be constructed. A methodology is a way of systematically breaking down and solving a problem in a manageable manner. Tools can enable methodologies, and, over time, tools may help to manage a methodology once it has become standardized. No standard methodologies exist today for PSS, neither are the capabilities of tools defined by the language. (more…)
Portable Stimulus: Finding The Killer App
Thursday, November 29th, 2018Functional verification vendors have been talking a lot about the Portable Stimulus Standard (PSS), but what is it and why should you care? To put it in stark terms – because it is the first language that supports verification methodology and because the existing methodology is failing to provide the capabilities required for system-level verification. (more…)
Beyond Portable Stimulus 1.0
Thursday, August 23rd, 2018With the release of the 1.0 version of the Portable Stimulus Standard (PSS), the industry now has a solid base on which to build solutions and to ensure that the time and investment made by users to create verification intent models is portable. This should allow them to assess tools and decide which one fits their requirements best and which ones will fulfill their roadmap into the future. Unfortunately, it is not quite as easy as that, because many users have already moved beyond the basics as represented in the standard. (more…)