RISC-V Foundation Showcases Continued Momentum and Growth at Embedded World 2019

The RISC-V Foundation booth will include live demonstrations of RISC-V implementations from member companies Andes Technology, CloudBEAR, GreenWaves Technologies, Imperas Software, SiFive, Syntacore and UltraSoC

(BUSINESS WIRE) — February 25, 2019 — RISC-V Foundation:

WHERE: Hall 3A, Booth No. 3A-536, NürnbergMesse, Messezentrum 1, 90471 Nürnberg, Germany

WHEN: Tuesday, Feb. 26 – Thursday, Feb. 28, 2019

WHAT: At Embedded World 2019, the RISC-V Foundation will be exhibiting at Hall 3A, Booth No. 3A-536, and will feature live demonstrations from co-exhibiting RISC-V Foundation member companies Andes Technology, CloudBEAR, GreenWaves Technologies, Imperas Software, SiFive, Syntacore and UltraSoC. Throughout the show, the booth will feature talks from RISC-V Foundation member companies. The RISC-V Foundation is also hosting a scavenger hunt across the show floor, challenging attendees to visit different booths in the RISC-V ecosystem for the chance to win a prize.

The main conference program will also feature a variety of RISC-V sessions, including a full day of RISC-V talks on Feb. 26 and a half-day RISC-V Workshop on Feb. 27, chaired by Cesare Garlati at the prpl Foundation and Hex Five Security. Speaking sessions include:

Session 5.1: RISC-V I Overview (Feb. 26)

  • RISC-V; Practical Industry Approach to Getting Started with This Technology
    • When: 9:30 – 10 CET
    • Who: Robert Oshana, NXP Semiconductors
  • How to Benefit from RISC-V Based Linux for Embedded Industrial Applications
    • When: 10:00 – 10:30 CET
    • Who: Krishnakumar R, Microchip Technology
  • The Soul of a New SoC: Hands-on Experience with Embedding a RISC-V Core
    • When: 10:30 – 11 CET
    • Who: Onno Martens, Trinamic Motion Control Gmbh & Co. KG
  • Methodology for Implementation of Custom Instructions in the RISC-V Architecture
    • When: 11:30 – Noon CET
    • Who: Larry Lapides, Imperas Software
  • Compliance Methodology and Initial Results for RISC-V ISA Implementations
    • When: Noon – 12:30 CET
    • Who: Lee Moore, Imperas Software

Session 5.2: RISC-V II Security (Feb. 26)

  • Maintaining Security in a Heterogeneous and Changing World
    • When: 14:30 – 15:00 CET
    • Who: Jon Geater, Jitsuin; Cesare Garlati, prpl Foundation and Hex Five Security
  • A New Zero-Trust Model for Securing Embedded Systems
    • When: 15:00 – 15:30 CET
    • Who:  Chris Conlon, wolfSSL; Cesare Garlati, prpl Foundation and Hex Five Security

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