Lattice To Highlight Need for Highly Reliable FPGAs at SEE/MAPLD

Lattice Nexus FPGA Platform Specifically Designed to Excel in Ruggedized Environments

HILLSBORO, Ore. — (BUSINESS WIRE) — August 23, 2021Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced the company will highlight the high reliability of FPGAs manufactured using fully depleted silicon-on-insulator (FD-SOI) technology in a virtual presentation at the 2021 Single Event Effects Symposium Military and Aerospace Programmable Logic Devices ( SEE/MAPLD) Workshop.

It is critical for electronic components operating in harsh environments to perform reliably despite environmental factors. The Lattice Nexus™ FPGA platform combines Lattice’s long-standing low power FPGA expertise with 28 nm FD-SOI semiconductor manufacturing technology to create FPGAs that demonstrate the high Total Ionizing Dose (TID) tolerance required for aerospace and defense applications.

Who: Lattice Semiconductor

What: 28 nm FD-SOI FPGA Total Ionizing Dose (TID) Tolerance

When: Wednesday, Sept. 1 at 2:30 p.m. PDT

Where: https://www.seemapld.org/ (Advance registration is required)

For more information about Lattice Nexus, please visit www.latticesemi.com/LatticeNexus.

About Lattice Semiconductor

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing Communications, Computing, Industrial, Automotive, and Consumer markets. Our technology, long-standing relationships, and commitment to world-class support let our customers quickly and easily unleash their innovation to create a smart, secure, and connected world.

For more information about Lattice, please visit www.latticesemi.com. You can also follow us via LinkedIn, Twitter, Facebook, YouTube, WeChat, Weibo, or Youku.

Lattice Semiconductor Corporation, Lattice Semiconductor (& design), and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. The use of the word “partner” does not imply a legal partnership between Lattice and any other entity.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.



Contact:

MEDIA CONTACT:
Sophia Hong
Lattice Semiconductor
503-268-8786
Sophia.Hong@latticesemi.com

INVESTOR CONTACT:
Rick Muscha
Lattice Semiconductor
408-826-6000
Rick.Muscha@latticesemi.com




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