Logic Design for Array-Based Circuitsby Donnamaie E. WhiteCopyright © 1996, 2001, 2002 Donnamaie E. White |
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Sizing the Design - Selecting the ArrayLast Edit July 22, 2001 Functional Specification - A Closer LookThe functional or target specification is the first level of description of the project that may encompass one or more arrays when the design is partitioned. There may be a specification tree with the total project at the top node and individual circuit blocks or modules detailed underneath. Topics included in a functional specification are listed in Table 3-1. At this early stage, a functional description of what is to be accomplished is created along with some of the top-level circuit requirements. Array InterfacingFor the partitioned project (multiple arrays), the individual array specifications would include a description of array interfacing.
Interconnection between arrays is faster when done with ECL. When choosing single or dual (differential) rail ECL use the following guidelines:
The potential need for differential ECL should be indicated at the functional specifica tion level.
Table 3-1 Components of The Functional specification
Hard SpecificationsDesign criteria that are considered as hard (inflexible) specifications should be clearly documented as such. Specifications that might be alterable should also be clearly identified. If a tradeoff or judgment call needs to be made during the remainder of the design project, such information can save time and possibly the project. Design ObjectivesOverall design objectives should be clearly identified and documented. These include optimization for speed, power or die size, which translates to minimized inter nal cell utilization and minimized I/O utilization. Since these objectives are in conflict, they should be prioritized. As a last step, there should be a careful design review of the circuit and sys tem functional specifications, and the partitioning
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Copyright @ 2001,
2002 Donnamaie E. White, White
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